1. Field of Invention
This invention relates to a semiconductor package. More particularly, the present invention is related to a leadless semiconductor package with an encapsulation formed therein for reducing the thermal mismatch between the package and the substrate for carrying said package.
2. Related Art
A well-known semiconductor package, such as a bump chip carrier package (BCC) or a quad flat non-leaded (QFN) package is applicable to communication products, portable electronics products, low pin-counts package structure and packages for high-frequency chips, such as chip with a working frequency exceeding 12 GHz.
As mentioned above, the bump chip carrier package employs a plurality of flat contacts, for example metal contacts with a size of 0.4 mm* 0.3 mm, for electrically connecting the chip and the substrate. Besides, the bump chip carrier package has a chip paddle exposed so as to be attached to a substrate through solder materials. Thus, the thermal performance of such BCC package will be enhanced. In addition, the electrical performance of such a BCC package can be enhanced by employing a ground ring.
Referring to FIG. 1, it illustrates a conventional leadless semiconductor package or a bump chip carrier package 10. Such package 10 mainly comprises a chip 20, a chip paddle or a metal pad 22, a plurality of leads 24, a plurality of wires 26, a plurality of ground ring 30 and an encapsulation 28. The back surface 12 of the chip 20 is attached to the chip paddle 22, and the active surface 14 is electrically connected to the leads 24 or the ground rings 30 through the wires 26. The encapsulation 28 encapsulates the chip 20, the wires 26, and the ground ring 30 and leaves the chip paddle 22 and the leads 24 exposed out of the encapsulation 28.
Besides, referring to FIG. 2, the package 10 is attached to a printed circuit board or a substrate 40 through a solder material 44 by surface mount technology. However, when there is a lot of difference of the coefficient of thermal expansion of the encapsulation 28 from that of the printed circuits board 40, it is easy to cause thermal stress at the solder material 44 due to the changes of the working temperature. Thus, the solder material 44 usually bears a lot of cyclic stress so as to cause the fatigue damage and cracks at the solder materials 44. In such a manner, the package 10 and the printed circuits board 40 will not be able to operate well.
Therefore, providing another leadless semiconductor package to solve the mentioned-above disadvantages is the most important task in this invention.